Black Semiconductor GmbH
Visit websiteSenior ATE Test Engineer
Salary not disclosed5+ yearsOnsite
- Engineering
- Aachen
- Full time
- 3d ago
Newly posted
About the role
As a Senior Automated Test Equipment (ATE) Test Engineer, you will own the bring-up and operation of high-volume 300 mm wafer test infrastructure for electronic-photonic integrated circuits. You will be responsible for setting up test cells, developing test programs for device characterization, and driving probe card design to scale from engineering to high-volume production.
Responsibilities
- Set up, qualify, and calibrate ATE test cells, ensuring readiness for high-volume wafer testing.
- Develop and debug automated test programs for DC, RF, optical, and electro-optical device characterization.
- Own probe card specifications, design, qualification, and integration in collaboration with vendors.
- Collaborate across teams to define measurement plans and contribute to design-for-test (DFT) implementation.
- Collect, analyze, and report wafer-level measurement data to support yield monitoring and failure analysis.
- Transfer laboratory characterization methods into production and optimize test throughput.
- Work with manufacturing engineering to implement statistical process control (SPC) and improve test efficiency.
Required skills
- ATE
- Wafer probers
- Java
- Python
- Electrical measurements
- Optical measurements
- Electro-optical measurements
- EIC
- PIC
- DFT
- Statistical analysis
- SPC
- Design Enablement
Nice to have
- RF testing
- High-speed testing
- LabVIEW
- Optoelectronic device physics
- Graphene-based devices
- Photonic component qualification
- Semiconductor packaging
Qualifications
- Master’s degree or Ph.D. in Engineering, Physics, or a related technical discipline
- At least five years of hands-on experience setting up and operating ATE systems
Benefits
- Health insurance
- Pension
- Virtual stock options
About the Company
Black Semiconductor GmbH is a company focused on transforming the semiconductor industry through graphene solutions. They connect chips to high-throughput, low-delay computing networks by combining electronic computing with photonic communication.