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Senior FPGA Verification Engineer

Salary not disclosed4–6 yearsOnsite

  • Engineering
  • Oxford
  • Today
Newly posted

About the role

The Senior FPGA Verification Engineer will support the FPGA team by developing verification test benches and contributing to the delivery of reliable quantum control systems. This role involves shaping hardware and RTL to support the development of advanced quantum systems while collaborating with cross-functional partners to ensure high standards of performance.

Responsibilities

  • Architect, develop, and maintain advanced UVM/SystemVerilog verification environments for complex FPGA designs.
  • Define and execute comprehensive verification plans, including constrained-random testing, functional coverage, and code coverage analysis.
  • Collaborate with RTL design engineers to debug issues, identify root causes, and ensure high-quality design implementation.
  • Develop and maintain automated regression suites and continuous integration pipelines to ensure design stability throughout the development lifecycle.

Required skills

  • FPGA verification
  • SystemVerilog
  • UVM
  • Python
  • Test automation
  • Scripting

Qualifications

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field

Benefits

  • IonQ stock options
  • Annual performance bonus
  • Annual leave
  • Private medical insurance
  • Dental insurance

About the Company

IonQ, Inc. is a leading quantum platform and merchant supplier delivering integrated quantum solutions across computing, networking, sensing, and security. The company is known for its cutting-edge quantum systems and holds world records in quantum computing performance.

Senior FPGA Verification Engineer at ionq · Grasshire